Zynq series devices access DDR via JTAG port

In the development process, hardware debugging will inevitably encounter a situation where the SD card, USB and network port may not be tuned, but some small amount of data is needed to verify the specific function. At this time, the data is restored to the DDR or the slave through the JTAG interface. DDR Dump data to the PC is an effective choice. The Xilinx SDK supports this feature. Here's a brief introduction:

(1) Step 1: Establish System Debug simulation under the SDK and select the current target debug core;

(2) Step 2: Click “Debug” to make the program run to the breakpoint you set;

(3) Step 3: Select “Xilinx Tools→Dump/Restore Data File” and check whether the operation you need to perform is “Dump Memory” or “Restore Memory”, specify the target file path of the PC, the starting address of the memory and The length of the data of the operation;

(4) Configure the target processor, Peers is selected as “Local”, and Contexts is selected as the core that the APU is currently being debugged;

(5) Click OK to perform the "Dump" or "Restore" operation until the SDK log print operation is completed (because the JTAG port data rate is low, it may take more time to transfer larger data).

Zynq系列器件通过JTAG口访问DDR

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