Implementation of nonvolatile, non-resettable counters in embedded systems

This article describes how to solve this problem by using the EPROM emulation mode and encoding mechanism of common serial EEPROM.

Design goals

In some applications, it is desirable to be able to count and record specific events, such as power up times, work hours, hard (button) resets, and timeouts, taking into account the warranty period. Traditional electronic counters are usually composed of a bistable multivibrator and are binary coded as shown in Figure 1. When all triggers are reset, the maximum count value is reached, and the counter size is determined by the maximum number of times that certain events are allowed to occur during the check period.

Bit Number
n+1 n ... 8 7 6 5 4 3 2 1
2n 2n-1 ... 27 26 25 twenty four twenty three twenty two twenty one 20

Figure 1. In the binary code, the next bit is doubled from the previous bit value.

Positioning requirements

Although trigger-based counters are easy to set up, they have one drawback. When the count limit is reached, the counter is inverted to zero (automatic reset). The working state is also volatile - the power supply is required to maintain its counting state. The first problem can be solved by freezing the counter when the limit is reached; the second problem can also be solved by installing a battery to maintain the counter's power supply. However, these measures may not be acceptable in practical applications because of increased costs and limited working hours.

An alternative is to back up the count value in an EEPROM or other form of non-volatile (NV) memory. The value stored in the NV memory is loaded to the counter the next time the power is turned on. However, unless the NV memory is embedded in another chip, such as a microcontroller or FPGA, the memory contents are not secure because the memory chips are easily removed, reprogrammed (reset), and then reinstalled onto the board. Therefore, this method does not meet the requirements of non-resettable.

Traditional design

EPROM is another non-volatile memory that does not require a battery. EPROM was widely used in the 1970s with the advent of microprocessors. When shipped from the factory, all bytes of the EPROM are FFh. Data is stored by setting a bit from 1 (erase) to 0 (program); programming requires a 12V to 13V pulse voltage. Before loading new data, the entire memory must be erased by illuminating the chip with a high-intensity ultraviolet light through a window on the package. One-Time Programming (OTP) EPROM devices have no windows and are therefore not erasable. Due to these inconveniences, the dominant position of EPROM is gradually replaced by EEPROM and high-density flash memory, and the latter two work and programming voltage is 5V or lower. Nonetheless, the OTP EPROM's one-time programmable (1 to 0) and non-erasable features combined with modern EEPROM technology enable new features in the EPROM emulation mode. The EPROM emulation mode is a key technology for implementing non-volatile, non-resettable counters.

EPROM emulation mode

A common function of serial EEPROM is to act as a buffer for writing pages, capable of programming the entire memory page at a time. When a write command is received, the system automatically loads the contents of the page buffer containing the addressed memory data. For the EPROM emulation mode, the buffer is written in accordance with the shift register (Figure 2). The input new data (D-IN) is sent to an AND gate, which is combined with the buffer data (S-OUT) before entering the buffer (S-IN). Therefore, the AND gate ensures that the memory bit does not become 1 after it is set to zero. After a full page operation cycle, the buffer's data is again aligned with the data in the memory page. A write cycle can then be initiated to copy the entire buffer contents to the non-volatile EEPROM.


Figure 2. EPROM emulation "synthesizes" new data with existing data bits and writes it back to memory.

EPROM count

Since the EPROM bit can only be changed in one direction, the traditional counter design is not supported, but the entire memory array is treated as an n-bit single. In the initial state, the n-bit memory cells are not programmed (1). In order to count events, the unprogrammed bits must be changed to zero. The next programming bit can be chosen at random, but the method shown in Figure 3 is easier to implement. The method counts in order from the least significant bit until all bits of one byte are programmed. Then program the next byte bit by bit and loop accordingly. In EPROM emulation mode, a 1024-bit memory chip can count 1024 events.

Count
Value
Hex
Code
Bit Number
8 7 6 5 4 3 2 1
0 FFh 1 1 1 1 1 1 1 1
1 FEh 1 1 1 1 1 1 1 0
2 FCh 1 1 1 1 1 1 0 0
3 F8h 1 1 1 1 1 0 0 0
4 F0h 1 1 1 1 0 0 0 0
5 E0h 1 1 1 0 0 0 0 0
6 C0h 1 1 0 0 0 0 0 0
7 80h 1 0 0 0 0 0 0 0
8 00h 0 0 0 0 0 0 0 0

Figure 3. The EPROM count requires the same value for each bit.

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