In the transmission interface of the current DVB-C broadcast television system, there are two MPEG-2 video transmission interface standards: asynchronous serial interface standard ASI and synchronous parallel interface SPI. There are a total of 11 useful signals in SPI. Each signal is differentiated into two signals to improve the anti-interference of transmission. DB25 is used for transmission on the physical link. Therefore, the connection is more and complicated, the transmission distance is short, and it is prone to failure. However, SPI is a parallel 11-bit signal, which is easy to process and has strong extensibility. Therefore, the output of the current general MPEG-2 video encoder and the input of the video decoder are standard parallel 11-bit signals. ASI uses serial transmission, only one coaxial cable is needed for transmission. The connection is simple and the transmission distance is long. According to the advantages and disadvantages of SPI and ASI, the conversion between SPI and ASI of the transmission signal is required.
1 SPI signal structure
The parallel transmission system SPI includes a one-bit clock signal, 8-bit data signal, one-bit frame synchronization signal PSYNC and one-bit data valid signal DVALID. The frame synchronization signal corresponds to the sync byte 047H of the TS packet, and the DVALID signal is used to distinguish the length of the TS packet from 188 bytes or 204 bytes. When the TS packet length is 188 bytes, the DVALID signal is always high, and all signals are synchronized with the clock signal. The SPI data format is shown in the figure.
2 ASI interface
ASI transport streams can have different data rates, but the transmission rate is constant at 270Mbps, so ASI can send and receive MPEG-2 data at different rates. The ASI transmission system has a layered structure. The highest layer and layer 2 use the MPEG-2 standard ISO / IEC 13818-1 (Systems), and layer 0 and layer 1 are FC fiber channels based on ISO / IEO CD 14165-1. FC supports a variety of physical transmission media. This solution uses coaxial cable transmission. Figure 2 is a block diagram of an ASI transmission system based on coaxial cable.
First convert the 8-bit codeword of the packet-synchronized MPEG-2 transport packet into a 10-bit codeword; then in parallel / serial conversion, when a new word is required and the data source is not ready, it should be inserted A K28.5 synchronization word to achieve ASI's fixed 270Mbps transmission rate. The formed serial bit stream will be sent to the coaxial cable connector through the buffer / drive circuit and the coupling network. There are three methods for inserting a synchronization codeword: before and after a single byte of the transmission codestream cannot be a synchronization word; before and after a single byte of the transmission codestream must be a synchronization word; or a combination of both.
The received data that arrives on the coaxial cable must first be coupled to the circuit that recovers the clock and data through the connector and the coupling network, and then performs serial / parallel conversion; in order to recover byte synchronization, the ASI decoder must first search for K28.5 synchronization Word, once the synchronization word is searched, the boundary is demarcated for the subsequent received data, thus establishing the correct byte arrangement of the output byte of the decoder; finally, 10 / 8-bit conversion is performed to restore the packet synchronization MPEG-2 TS stream data. But the K28.5 sync word is not valid data, so it must be deleted when decoding.
3 ASI interface implementation plan
In this solution, the MPEG-2 TS code stream is provided by a single-chip MPEG-2 encoder MB86390, which outputs a parallel 11-bit signal that conforms to the SPI standard, and the TS packet length is 188 bytes. In the SPI / ASI conversion scheme, CYPRESS cyb923 / cyb933 chip, asynchronous FIFO and logic programmer CPLD are mainly used.
cyb923 mainly realizes 8 / 10bit conversion of code words, inserts synchronization word K28.5 and parallel / serial conversion. The transmission rate of ASI is constant at 270MHz, and the input MPEG-2 TS code rate is different, so to use FIFO to achieve rate matching, you need to logically control the communication between input SPI data, FIFO and cyb923. Considering the comprehensive performance, price and program complexity, this solution uses the CPLD logic programmer XC95108 of xilinx company; use VHDL programming to realize their logic control. ASI decoding is also a similar process, cyb933 mainly implements 10 / 8bit conversion, removing the synchronization word K28.5 and serial-to-parallel conversion.
3.1 ASI code
In the encoding process of ASI, only the eight-bit data of MPEG-2 TS and one-bit TS code rate transmission clock are input to CPLD. Because in this scheme, the TS format is 188 bytes, so the data valid signal DVALID is always high, CPLD ignores this signal, just receives the TS stream data, and does not care about the synchronization header of the TS stream. The PSYNC frame synchronization signal is also ignored. The CPLD writes the received data to the FIFO at the TS code rate clock. When the FIFO is half full, the CPLD receives the half full signal of the FIFO, and then the CPLD sends the FIFO readable signal to the cyb923, and the cyb923 reads the data in the FIFO at 27Mbps; when the CPLD counts to the cyb923, it reads a certain amount of FIFO data, CPLD Then send the FIFO unreadable signal to cyb923 to prevent the FIFO from reading empty. The parallel maximum speed of MPEG-2 transmission code rate is 27/8 = 3.375Mbps, and the read FIFO rate is 27Mbps, so the FIFO will not overflow. Considering the delay, this solution uses a smaller capacity FIFO7202. Cyb923 fills the ASI code stream with K28.5 when the FIFO is unreadable to maintain a fixed transmission rate of 270Mbps. Finally, the serial data can be transmitted through the coaxial cable after being driven. In this solution, the insertion of the synchronization word K28.5 adopts the method of not all the K28.5 synchronization words before and after a single byte of the transmission code stream. Compared with the other two schemes, this scheme is relatively simple to judge and process.
Resistor (Resistor) commonly known as resistance directly in our daily life.It is a current limiting element. When the resistance is connected to the circuit, the resistance value of the resistor is fixed, usually two pins.Fixed resistors are those whose resistances cannot be changed.Resistance variable is called potentiometer or variable resistor.The ideal resistor is linear, that is, the instantaneous current through the resistor is proportional to the applied instantaneous voltage.Variable resistor for partial pressure.On the exposed resistor body, one or two movable metal contacts are pressed tightly.The contact position determines the resistance between any end of the resistance body and the contact.
Electronic Components Resistor
Electronic Components Resistor,Metal Film Resistor,Metal Oxide Film Resistor
YANGZHOU POSITIONING TECH CO., LTD , https://www.yzpstcc.com