Abstract: This application note lists the frequently asked questions (FAQ) of the SPI interface peripheral controller MAX3420E.
General Questions What is the MAX3420E? Does the MAX3420E include a microprocessor? What kind of package can the MAX3420E provide? Does the MAX3420E provide a lead-free package? USB Question What USB rate does the MAX3420E support? Does the MAX3420E comply with the USB specification? Which version does the MAX3420E support? How many endpoints? Why does n’t the MAX3420E support synchronous transmission? Can I use the MAX3420E in a self-powered peripheral? Can I use the MAX3420E in a bus-powered peripheral? What kind of external circuit is required to connect the MAX3420E to a USB? Can you recommend a A 3.3V voltage regulator? What role does the CONNECT bit play? Interface problem How is the microprocessor connected to the MAX3420E? The SPI interface is 3, 4 or 5 wires. What does this mean? What SPI clock mode does the MAX3420E support? My CPU uses a 2.5V power supply, but the MAX3420E uses a 3.3V VCC power supply. Do I need an external level shifter? What is the function of the MAX3420E's INT pin? Does the MAX3420E support active-low lines or interrupts? Does it support edge-active interrupts? What is the maximum rate of the MAX3420E SPI interface (SCLK maximum frequency)? Does the MAX3420E SCLK frequency have a lower limit? I have an 8-pin microprocessor, and 5 of its IO pins need to be connected to the MAX3420E. How do I allocate IO? Do I need to add an external pull-up resistor to the GPIN pin? Can I use the SPI interface pin to drive the optocoupler? What is the role of the VBCOMP pin? Does it power the MAX3420E? Programming issues with my firmware How do I communicate with the MAX3420E? How do I set up the MAX3420E to handle USB enumeration? How do I program to implement BULK IN transfer? When the firmware loads the IN FIFO, what happens when a USB IN request is received? How do I know when I need to load the IN FIFO? What happens if a USB transmission error occurs? Do I need to write code to handle this error? How to program the BULK OUT transmission? How about the INTERRUPT transmission? How to program the SETUP transmission? Do I need to set the USB data trigger? ? Clear the MAX3420E interrupt request bit by writing "1". Is this a reverse operation? Are there any programming tips? Host software questions How does my Windows application communicate with the MAX3420E? Does Maxim provide custom Windows drivers? What example code does Maxim provide? I want to design a MAX3420E-based Device, but does not meet the standard Windows category. How should I use the Windows driver? How does the MAX3420E compare to the USB "serial bridge" chip? What are the advantages and disadvantages of using the MAX3420E? Other questions Can my firmware determine the version of the chip I am using? What is the latest version number of the MAX3420E? ? General question What is the MAX3420E?
The MAX3420E is a USB full-speed (12Mbps) peripheral controller with a built-in transceiver and a USB serial interface engine (SIE) that handles specific underlying USB signaling.
Does the MAX3420E include a microprocessor?
Not included. The MAX3420E is designed for easy connection with microprocessors, DSPs, and ASICs. It can add USB functionality to any system without having to change processors or development tools.
What kind of package can the MAX3420E provide?
The MAX3420E is available in two packages. The 32-pin TQFP (7mm x 7mm package size) package, with package leads, is ideal for prototype development and short production cycles. The 24-lead TQFN package (5mm x 5mm package size, pads below the package) is suitable for high-volume compact products.
Does the MAX3420E offer lead-free packaging?
Yes. USB question What USB rate does the MAX3420E support?
The MAX3420E as a peripheral supports USB full-speed (12Mbps) operating mode.
Does the MAX3420E comply with the USB specification? Which version?
The MAX3420E complies with the USB 2.0 specification and can work at full speed.
How many endpoints does the MAX3420E support?
The MAX3420E includes four endpoints: EP0, a bidirectional CONTROL endpoint, and a 64-byte FIFO. EP1, OUT BULK or INT endpoint, 2 x 64 bytes double buffer FIFO. EP2, IN BULK or INT endpoint, 2 x 64 bytes double buffer FIFO. EP3, IN BULK or INT endpoint, 64-byte FIFO. Through these endpoints, you can build USB peripherals that support universal USB drivers, such as human-machine interface devices (HID), mass storage, image transfer protocol (PTP), and printers.
Why doesn't the MAX3420E support synchronous transmission?
Synchronous transmission requires a fast interface and large-capacity buffers, which are inconsistent with the MAX3420E's design goals (SPI interface low-cost devices that can run at any rate). Most applications that require synchronous bandwidth can actually be completed by BULK or INTERRUPT transmission. This is because most of the synchronous bandwidth that USB devices in the system can provide, BULK / INT transmission can usually also provide.
Can I use the MAX3420E in self-powered peripherals?
of course can. In fact, the MAX3420E integrates specialized features to support self-powered applications. For example, peripherals in self-powered applications need to know when the device is plugged into a powered USB port. The MAX3420E's VBCOMP (VBUS comparator) pin is connected to VBUS and connected to the internal comparator. This comparator provides an interrupt request (VBUSIRQ) when plugged into the USB port, and another interrupt request when disconnected from the USB port NOVBUSIRQ). The MAX3420E has another function. When VBUS is detected to be disconnected, the VBGATE (VBUS control) bit can be set to automatically disconnect the D + pull-up resistor. This is also required by the USB specification.
Can I use the MAX3420E in bus-powered peripherals?
Yes. In bus-powered applications, a 3.3V regulator is connected to the VBUS pin of the USB connector. When the peripheral is plugged into the USB port, the voltage regulator powers the chip and the SPI main controller. Therefore, the VBCOMP pin of the MAX3420 does not need to be connected to VBUS. In this case, the VBCOMP input can be used as an additional general-purpose input. Care must be taken to ensure that the input signal at this pin meets the threshold requirements given in the MAX3420 Electrical CharacterisTIcs table.
What external circuit is required to connect the MAX3420E to USB?
The MAX3420E requires a 3.3V VCC. The bus-powered peripheral requires a 3.3V regulator to convert the voltage on the VBUS pin (4.4V to 5.25V) to 3.3V. In addition, the MAX3420E requires an external crystal (parallel resonance, 12MHz ± 0.25%), the load capacitance of each pin is connected to ground, and two resistors (33) must be connected in series between the D + / D- output (33![]()
, 1%), also need a USB "B" connector.
Can you recommend a 3.3V regulator?
MAX6349TL is more suitable. It can provide 3.3V, 150mA output, with a power-on reset (POR) circuit, which can be directly connected to the RES # pin of the MAX3420E. In a hot-swap design such as a USB peripheral, a good external POR circuit is very important.
What does the CONNECT bit do?
The MAX3420E has a switchable 1500 between the D + pin and VCC![]()
Pull-up resistor. The CONNECT bit controls the state of the switch. This switch allows peripherals powered by the bus to complete initialization before being connected to the USB. According to the requirements of the USB specification, in the absence of VBUS, it also allows self-powered peripherals to disconnect VCC on the pull-up resistor. Interface problem How is the microprocessor connected to the MAX3420E?
The microprocessor completes the function of the SPI master controller and uses a 3, 4, or 5 wire interface to connect to the MAX3420E. Some microcontrollers include a hardware SPI, but most do not. For the latter case, you can use the general-purpose IO pins to implement the SPI master controller through bit simulation.
The SPI interface is 3, 4 or 5 wires. What does it mean?
The simplest SPI interface includes three lines: SS # (slave selection), SCLK (serial clock), and MISO (bidirectional MISO / MOSI data configuration). Because the interface does not use the INT pin, the control microprocessor needs to query the two interrupt request registers to determine when the MAX3420E needs to be serviced.
The SPI mode is usually expressed in the form of (x, y), where one variable is the clock polarity CPOL and the other is the clock phase CPHA. The MAX3420E does not require a mode bit and can work in mode (0,0) or (1,1). The only difference between these modes is the invalid SCLK level: (0,0) is low and (1,1) is high. The MAX3420E SPI interface has two basic requirements: The MOSI data provided to the MAX3420E must be valid before the first SCLK rising edge. Sample the SPI input data on the rising edge of the clock and output the data on the falling edge of SCLK. Attention should be paid to these modes-some microprocessor data does not support (0,0) and (1,1) mode. When setting the clock mode, it is best to verify the above two points. See the MAX3420E data sheet and the MAX3420E programming guide for SPI example waveforms.
My CPU uses a 2.5V power supply, but the MAX3420E uses a 3.3V VCC power supply. Do I need an external level shifter?
No need. The MAX3420E includes an internal level shifter. The internal logic is powered by the VL pin, which is used as the logical reference voltage for the SPI and IO pin signals. For the 2.5V interface, connect the VL pin to the 2.5V power supply. The VL pin is capable of operating from 1.7V to 3.6V. If the controller uses a 3.3V power supply, connect VL to VCC.
What does the MAX3420E INT pin do?
When the MAX3420E needs service, the INT pin becomes active. During the operation of the USB peripheral, these conditions include the arrival of SETUP, IN, or OUT packets, and bus events such as bus reset, suspend, and resume. When using this pin in the system, since there is no need to query the interrupt request bit through the SPI interface, the SPI traffic can be reduced.
Does the MAX3420E support active low line or interrupt? Does it support edge active interrupt?
The MAX3420E supports two types of interrupts through the INTLEVEL control bit. When INTLEVEL = 1 is set, the INT output pin is an open-drain, low-level effective output, suitable for line or application. This mode requires an external pull-up resistor connected to VL. When INTLEVEL = 0 (default value) is set, the INT pin is an edge-effective output with a push-pull output driver. In the edge mode, the edge polarity is set to the rising or falling edge through the POSINT bit.
What is the maximum rate of the MAX3420E SPI interface (SCLK maximum frequency)?
When VL is equal to or greater than 2.5V, the SCLK signal can be as high as 26MHz. For lower VL voltages, the data sheet shows how much the maximum frequency of SCLK needs to be reduced.
Is there a lower limit for the MAX3420E SCLK frequency?
No. The clock can remain high or low indefinitely. Similarly, when SS # is high, the MAX3420E will ignore the conversion of SCLK.
I have an 8-pin microprocessor, and 5 of its IO pins need to be connected to the MAX3420E. How do I allocate IO?
The MAX3420E has four general-purpose outputs (GPOUT3-0) and four general-purpose input pins (GPIN3-0), which are set and read through the IOPINS register R20. This fills the microcontroller pins used to implement the SPI interface and adds additional pins.
Do I need to add an external pull-up resistor to the GPIN pin?
No need. GPIN pin is internally pulled up to (typical value is 20k![]()
) VL.
Can I use the SPI interface pins to drive the optocoupler?
can. The MAX3420E output has a sufficiently large drive current to drive the optocoupler's LED through a series resistor. Please refer to the data sheet for the exact drive specifications. The output buffer was designed for optical isolation from the beginning, so the MAX3420E's SPI interface is ideal for building an electrically isolated USB.
What is the role of the VBCOMP pin? Does it power the MAX3420E?
Do not. The VBCOMP pin does not supply power to any part of the MAX3420E. It is only connected to an internal comparator to detect whether VBUS is connected. Programming questions How does my firmware communicate with the MAX3420E?
The MAX3420E has 21 registers that can be accessed through the slave SPI interface. The SPI master controller first sends a command byte, sets the register address and direction, and then transmits one or more data bytes.
How do I set up the MAX3420E to handle USB enumeration?
As a peripheral, the MAX3420E only needs to respond to commands from the host (usually a PC).
How to program BULK IN transmission?
When data needs to be sent to the host, load the IN FIFO first, and then write to the byte count register of the specific endpoint. Since the length of the IN FIFO is 64 bytes, 64 bytes can be loaded at a time. After the data is loaded, write the number of bytes loaded into the IN FIFO to the BYTECOUNT register of the IN endpoint. Writing to the byte count register makes the USB transfer endpoint "ready". MAX3420E will complete the work behind. When the next IN request for the device address is received, the prepared endpoint sends the FIFO data to the host.
When the firmware loads the IN FIFO, what happens when a USB IN request is received at this time?
The MAX3420E noticed this problem. It uses a NAK (Negative Acknowledgement) handshake signal to automatically respond to IN requests with the IN FIFO "not ready". This handshake signal informs the USB host that the endpoint is busy, and the host should try with another IN request later.
How do I know when I need to load an IN FIFO?
The MAX3420E provides interrupt request bits for IN endpoints, namely IN3BAVIRQ, IN2BAVIRQ, and IN0BAVIRQ, where "BAV" means "buffer available". After the device is reset, or the IN FIFO data has been successfully transmitted and the host responds, the MAX3420E logic will set the BAVIRQ bit of the IN endpoint. At power-up, the BAVIRQ bit is set, indicating that the IN FIFO can be loaded. These are the only register bits that are set at reset, and all other bits are set to 0.
What happens if a USB transfer error occurs? Do I need to write code to handle the error?
No need. The MAX3420E handles these situations for you. If the MAX3420E receives an error condition from the host, when the host retries the IN transmission, the MAX3420E automatically resends the same data. The MAX3420E also automatically handles other error checking, such as data triggering. Certain USB errors (for example, the user unplugs the cable during data transfer) need to be handled by the firmware.
How to program BULK OUT transmission?
When the host sends OUT data, the MAX3420E stores the bytes in an OUT endpoint FIFO. After the transfer is complete and it is verified that there are no errors, the MAX3420E triggers the "DAV" (data available) interrupt request bit of the specific endpoint. This will prompt the SPI controller to read the FIFO bytes. The SPI controller first reads the OUT FIFO byte count register to determine how many bytes are available in the 64-byte FIFO. Then, it reads the corresponding number of bytes by repeatedly reading the OUT FIFO register. Finally, the SPI controller clears the OUT DAV IRQ bit to "re-prepare" another transfer.
What about INTERRUPT transmission?
The case of interrupting transmission is the same as BULK transmission. The difference is only in how the device descriptor returned to the host during the enumeration is explained.
How to program SETUP transmission?
The USB host uses the CONTROL transmission to send a SETUP packet to the MAX3420E and 8 bytes used as a USB "opcode". The MAX3420E stores these bytes in an 8-byte FIFO, and then triggers an interrupt request for Setup data availability. The SPI main controller reads the 8 SETUP bytes at the register address R4 (SUDFIFO), obtains the USB operation commands from these bytes, and performs the corresponding operations. After the operation is completed, the SPI master controller sets the ACKSTAT bit (ACK for response, STAT for status phase) to high to notify the MAX3420E to respond to the status phase of the CONTROL transmission.
Do I need to set up USB data trigger?
No need. During USB transfer, the MAX3420E automatically handles these triggers. The only situation that requires firmware intervention is when the host sets a new configuration in a multi-configuration design, which is very rare. For this purpose, the MAX3420E provides register bits to clear the endpoint trigger.
Clear the MAX3420E interrupt request bit by writing "1" to it. Is this the reverse operation?
It looks like reverse operation, but it is the most effective way to clear the register bit. In response to a typical interrupt request, the SPI host controller reads an interrupt request register (USBIRQ or EPIRQ) and checks with different mask bits to determine the source of the interrupt. For example, when testing the SUDAVIRQ interrupt request, the firmware reads R11 (EPIRQ), and reads the result with 00100000 (the SUDAVIRQ bit is the 5th bit) and operates. Programs generally use identifiers to represent 00100000, such as bmSUDAV. Once it is detected that the IRQ bit is equal to 1, the firmware can write the mask value back to the register (SUDAVIRQ = bmSUDAV) and only clear the bits that need to be cleared. The IRQ bit that writes zero is not changed.
Are there any programming tips?
When using SPI full-duplex mode, the first register access operation should set the FDUPSPI bit to 1, in order to correctly set the interface for subsequent access. Host software problem How can my Windows® application software communicate with the MAX3420E?
The Windows application software communicates with the USB host controller of the PC through the driver. The driver can be built in Windows or customized. Windows contains standard device class drivers, such as human-machine interface devices (HID) and mass storage devices. If your firmware supports one of these standard devices, your users do not need to install custom drivers.
Not available.
What example code does Maxim provide?
The USB EnumeraTIon Code (and More) for MAX3420E on the Maxim website provides example C code for implementing HID applications. The example code simulates a PC keyboard, and when the key is pressed, the text is entered into any Windows application (for example, Notepad) that can receive text. The application program complies with the standard HID category and does not require custom Windows drivers to run normally. Regardless of your target application, most of the example code is a USB "boilerplate" that can be used as the starting code for your application.
I want to design a device based on the MAX3420E, but there are no two options: Write your own Windows driver. This is more complicated and difficult, and is only recommended for experts. Purchase universal drivers. It is generally composed of a USB driver and a C function library that accesses the driver. The driver should match the VID (Vendor ID) and PID (Product ID) in your device descriptor. Microsoft will provide a universal BULK driver for USB in the upcoming "Vista" version of Windows. How does the MAX3420E compare to the USB "serial bridge" chip?
The USB serial bridge chip uses its USB port to connect to the PC, but for applications running on the PC, it is a virtual COM port. A custom driver provided by the chip supplier is required to achieve this COM to USB conversion. In this way, Windows applications that communicate with serial (COM) ports (such as HyperTerminal) can communicate with devices connected via USB.
The disadvantage is that the MAX3420E controller requires firmware, and Maxim does not provide custom Windows drivers. But Maxim provides example firmware to show how to comply with the standard Windows device class (HID) to use the drivers that come with Windows.
Yes. The read-only register R18 contains the version number.
What is the latest version number of MAX3420E?
For the latest version of data and errata, please refer to the MAX3420E QV.
General Questions What is the MAX3420E? Does the MAX3420E include a microprocessor? What kind of package can the MAX3420E provide? Does the MAX3420E provide a lead-free package? USB Question What USB rate does the MAX3420E support? Does the MAX3420E comply with the USB specification? Which version does the MAX3420E support? How many endpoints? Why does n’t the MAX3420E support synchronous transmission? Can I use the MAX3420E in a self-powered peripheral? Can I use the MAX3420E in a bus-powered peripheral? What kind of external circuit is required to connect the MAX3420E to a USB? Can you recommend a A 3.3V voltage regulator? What role does the CONNECT bit play? Interface problem How is the microprocessor connected to the MAX3420E? The SPI interface is 3, 4 or 5 wires. What does this mean? What SPI clock mode does the MAX3420E support? My CPU uses a 2.5V power supply, but the MAX3420E uses a 3.3V VCC power supply. Do I need an external level shifter? What is the function of the MAX3420E's INT pin? Does the MAX3420E support active-low lines or interrupts? Does it support edge-active interrupts? What is the maximum rate of the MAX3420E SPI interface (SCLK maximum frequency)? Does the MAX3420E SCLK frequency have a lower limit? I have an 8-pin microprocessor, and 5 of its IO pins need to be connected to the MAX3420E. How do I allocate IO? Do I need to add an external pull-up resistor to the GPIN pin? Can I use the SPI interface pin to drive the optocoupler? What is the role of the VBCOMP pin? Does it power the MAX3420E? Programming issues with my firmware How do I communicate with the MAX3420E? How do I set up the MAX3420E to handle USB enumeration? How do I program to implement BULK IN transfer? When the firmware loads the IN FIFO, what happens when a USB IN request is received? How do I know when I need to load the IN FIFO? What happens if a USB transmission error occurs? Do I need to write code to handle this error? How to program the BULK OUT transmission? How about the INTERRUPT transmission? How to program the SETUP transmission? Do I need to set the USB data trigger? ? Clear the MAX3420E interrupt request bit by writing "1". Is this a reverse operation? Are there any programming tips? Host software questions How does my Windows application communicate with the MAX3420E? Does Maxim provide custom Windows drivers? What example code does Maxim provide? I want to design a MAX3420E-based Device, but does not meet the standard Windows category. How should I use the Windows driver? How does the MAX3420E compare to the USB "serial bridge" chip? What are the advantages and disadvantages of using the MAX3420E? Other questions Can my firmware determine the version of the chip I am using? What is the latest version number of the MAX3420E? ? General question What is the MAX3420E?
The MAX3420E is a USB full-speed (12Mbps) peripheral controller with a built-in transceiver and a USB serial interface engine (SIE) that handles specific underlying USB signaling.
Does the MAX3420E include a microprocessor?
Not included. The MAX3420E is designed for easy connection with microprocessors, DSPs, and ASICs. It can add USB functionality to any system without having to change processors or development tools.
What kind of package can the MAX3420E provide?
The MAX3420E is available in two packages. The 32-pin TQFP (7mm x 7mm package size) package, with package leads, is ideal for prototype development and short production cycles. The 24-lead TQFN package (5mm x 5mm package size, pads below the package) is suitable for high-volume compact products.
Does the MAX3420E offer lead-free packaging?
Yes. USB question What USB rate does the MAX3420E support?
The MAX3420E as a peripheral supports USB full-speed (12Mbps) operating mode.
Does the MAX3420E comply with the USB specification? Which version?
The MAX3420E complies with the USB 2.0 specification and can work at full speed.
How many endpoints does the MAX3420E support?
The MAX3420E includes four endpoints: EP0, a bidirectional CONTROL endpoint, and a 64-byte FIFO. EP1, OUT BULK or INT endpoint, 2 x 64 bytes double buffer FIFO. EP2, IN BULK or INT endpoint, 2 x 64 bytes double buffer FIFO. EP3, IN BULK or INT endpoint, 64-byte FIFO. Through these endpoints, you can build USB peripherals that support universal USB drivers, such as human-machine interface devices (HID), mass storage, image transfer protocol (PTP), and printers.
Why doesn't the MAX3420E support synchronous transmission?
Synchronous transmission requires a fast interface and large-capacity buffers, which are inconsistent with the MAX3420E's design goals (SPI interface low-cost devices that can run at any rate). Most applications that require synchronous bandwidth can actually be completed by BULK or INTERRUPT transmission. This is because most of the synchronous bandwidth that USB devices in the system can provide, BULK / INT transmission can usually also provide.
Can I use the MAX3420E in self-powered peripherals?
of course can. In fact, the MAX3420E integrates specialized features to support self-powered applications. For example, peripherals in self-powered applications need to know when the device is plugged into a powered USB port. The MAX3420E's VBCOMP (VBUS comparator) pin is connected to VBUS and connected to the internal comparator. This comparator provides an interrupt request (VBUSIRQ) when plugged into the USB port, and another interrupt request when disconnected from the USB port NOVBUSIRQ). The MAX3420E has another function. When VBUS is detected to be disconnected, the VBGATE (VBUS control) bit can be set to automatically disconnect the D + pull-up resistor. This is also required by the USB specification.
Can I use the MAX3420E in bus-powered peripherals?
Yes. In bus-powered applications, a 3.3V regulator is connected to the VBUS pin of the USB connector. When the peripheral is plugged into the USB port, the voltage regulator powers the chip and the SPI main controller. Therefore, the VBCOMP pin of the MAX3420 does not need to be connected to VBUS. In this case, the VBCOMP input can be used as an additional general-purpose input. Care must be taken to ensure that the input signal at this pin meets the threshold requirements given in the MAX3420 Electrical CharacterisTIcs table.
What external circuit is required to connect the MAX3420E to USB?
The MAX3420E requires a 3.3V VCC. The bus-powered peripheral requires a 3.3V regulator to convert the voltage on the VBUS pin (4.4V to 5.25V) to 3.3V. In addition, the MAX3420E requires an external crystal (parallel resonance, 12MHz ± 0.25%), the load capacitance of each pin is connected to ground, and two resistors (33) must be connected in series between the D + / D- output (33
Can you recommend a 3.3V regulator?
MAX6349TL is more suitable. It can provide 3.3V, 150mA output, with a power-on reset (POR) circuit, which can be directly connected to the RES # pin of the MAX3420E. In a hot-swap design such as a USB peripheral, a good external POR circuit is very important.
What does the CONNECT bit do?
The MAX3420E has a switchable 1500 between the D + pin and VCC
The microprocessor completes the function of the SPI master controller and uses a 3, 4, or 5 wire interface to connect to the MAX3420E. Some microcontrollers include a hardware SPI, but most do not. For the latter case, you can use the general-purpose IO pins to implement the SPI master controller through bit simulation.
The SPI interface is 3, 4 or 5 wires. What does it mean?
The simplest SPI interface includes three lines: SS # (slave selection), SCLK (serial clock), and MISO (bidirectional MISO / MOSI data configuration). Because the interface does not use the INT pin, the control microprocessor needs to query the two interrupt request registers to determine when the MAX3420E needs to be serviced.
By setting the control bit (FDUPSPI, full-duplex SPI), the MOSI and MISO data appear on different pins, and a 4-wire interface can be realized. Finally, an INT (interrupt output) pin can be connected to the processor's interrupt system.
The SPI mode is usually expressed in the form of (x, y), where one variable is the clock polarity CPOL and the other is the clock phase CPHA. The MAX3420E does not require a mode bit and can work in mode (0,0) or (1,1). The only difference between these modes is the invalid SCLK level: (0,0) is low and (1,1) is high. The MAX3420E SPI interface has two basic requirements: The MOSI data provided to the MAX3420E must be valid before the first SCLK rising edge. Sample the SPI input data on the rising edge of the clock and output the data on the falling edge of SCLK. Attention should be paid to these modes-some microprocessor data does not support (0,0) and (1,1) mode. When setting the clock mode, it is best to verify the above two points. See the MAX3420E data sheet and the MAX3420E programming guide for SPI example waveforms.
My CPU uses a 2.5V power supply, but the MAX3420E uses a 3.3V VCC power supply. Do I need an external level shifter?
No need. The MAX3420E includes an internal level shifter. The internal logic is powered by the VL pin, which is used as the logical reference voltage for the SPI and IO pin signals. For the 2.5V interface, connect the VL pin to the 2.5V power supply. The VL pin is capable of operating from 1.7V to 3.6V. If the controller uses a 3.3V power supply, connect VL to VCC.
What does the MAX3420E INT pin do?
When the MAX3420E needs service, the INT pin becomes active. During the operation of the USB peripheral, these conditions include the arrival of SETUP, IN, or OUT packets, and bus events such as bus reset, suspend, and resume. When using this pin in the system, since there is no need to query the interrupt request bit through the SPI interface, the SPI traffic can be reduced.
Does the MAX3420E support active low line or interrupt? Does it support edge active interrupt?
The MAX3420E supports two types of interrupts through the INTLEVEL control bit. When INTLEVEL = 1 is set, the INT output pin is an open-drain, low-level effective output, suitable for line or application. This mode requires an external pull-up resistor connected to VL. When INTLEVEL = 0 (default value) is set, the INT pin is an edge-effective output with a push-pull output driver. In the edge mode, the edge polarity is set to the rising or falling edge through the POSINT bit.
What is the maximum rate of the MAX3420E SPI interface (SCLK maximum frequency)?
When VL is equal to or greater than 2.5V, the SCLK signal can be as high as 26MHz. For lower VL voltages, the data sheet shows how much the maximum frequency of SCLK needs to be reduced.
Is there a lower limit for the MAX3420E SCLK frequency?
No. The clock can remain high or low indefinitely. Similarly, when SS # is high, the MAX3420E will ignore the conversion of SCLK.
I have an 8-pin microprocessor, and 5 of its IO pins need to be connected to the MAX3420E. How do I allocate IO?
The MAX3420E has four general-purpose outputs (GPOUT3-0) and four general-purpose input pins (GPIN3-0), which are set and read through the IOPINS register R20. This fills the microcontroller pins used to implement the SPI interface and adds additional pins.
Do I need to add an external pull-up resistor to the GPIN pin?
No need. GPIN pin is internally pulled up to (typical value is 20k
Can I use the SPI interface pins to drive the optocoupler?
can. The MAX3420E output has a sufficiently large drive current to drive the optocoupler's LED through a series resistor. Please refer to the data sheet for the exact drive specifications. The output buffer was designed for optical isolation from the beginning, so the MAX3420E's SPI interface is ideal for building an electrically isolated USB.
What is the role of the VBCOMP pin? Does it power the MAX3420E?
Do not. The VBCOMP pin does not supply power to any part of the MAX3420E. It is only connected to an internal comparator to detect whether VBUS is connected. Programming questions How does my firmware communicate with the MAX3420E?
The MAX3420E has 21 registers that can be accessed through the slave SPI interface. The SPI master controller first sends a command byte, sets the register address and direction, and then transmits one or more data bytes.
How do I set up the MAX3420E to handle USB enumeration?
As a peripheral, the MAX3420E only needs to respond to commands from the host (usually a PC).
How to program BULK IN transmission?
When data needs to be sent to the host, load the IN FIFO first, and then write to the byte count register of the specific endpoint. Since the length of the IN FIFO is 64 bytes, 64 bytes can be loaded at a time. After the data is loaded, write the number of bytes loaded into the IN FIFO to the BYTECOUNT register of the IN endpoint. Writing to the byte count register makes the USB transfer endpoint "ready". MAX3420E will complete the work behind. When the next IN request for the device address is received, the prepared endpoint sends the FIFO data to the host.
When the firmware loads the IN FIFO, what happens when a USB IN request is received at this time?
The MAX3420E noticed this problem. It uses a NAK (Negative Acknowledgement) handshake signal to automatically respond to IN requests with the IN FIFO "not ready". This handshake signal informs the USB host that the endpoint is busy, and the host should try with another IN request later.
How do I know when I need to load an IN FIFO?
The MAX3420E provides interrupt request bits for IN endpoints, namely IN3BAVIRQ, IN2BAVIRQ, and IN0BAVIRQ, where "BAV" means "buffer available". After the device is reset, or the IN FIFO data has been successfully transmitted and the host responds, the MAX3420E logic will set the BAVIRQ bit of the IN endpoint. At power-up, the BAVIRQ bit is set, indicating that the IN FIFO can be loaded. These are the only register bits that are set at reset, and all other bits are set to 0.
What happens if a USB transfer error occurs? Do I need to write code to handle the error?
No need. The MAX3420E handles these situations for you. If the MAX3420E receives an error condition from the host, when the host retries the IN transmission, the MAX3420E automatically resends the same data. The MAX3420E also automatically handles other error checking, such as data triggering. Certain USB errors (for example, the user unplugs the cable during data transfer) need to be handled by the firmware.
How to program BULK OUT transmission?
When the host sends OUT data, the MAX3420E stores the bytes in an OUT endpoint FIFO. After the transfer is complete and it is verified that there are no errors, the MAX3420E triggers the "DAV" (data available) interrupt request bit of the specific endpoint. This will prompt the SPI controller to read the FIFO bytes. The SPI controller first reads the OUT FIFO byte count register to determine how many bytes are available in the 64-byte FIFO. Then, it reads the corresponding number of bytes by repeatedly reading the OUT FIFO register. Finally, the SPI controller clears the OUT DAV IRQ bit to "re-prepare" another transfer.
What about INTERRUPT transmission?
The case of interrupting transmission is the same as BULK transmission. The difference is only in how the device descriptor returned to the host during the enumeration is explained.
How to program SETUP transmission?
The USB host uses the CONTROL transmission to send a SETUP packet to the MAX3420E and 8 bytes used as a USB "opcode". The MAX3420E stores these bytes in an 8-byte FIFO, and then triggers an interrupt request for Setup data availability. The SPI main controller reads the 8 SETUP bytes at the register address R4 (SUDFIFO), obtains the USB operation commands from these bytes, and performs the corresponding operations. After the operation is completed, the SPI master controller sets the ACKSTAT bit (ACK for response, STAT for status phase) to high to notify the MAX3420E to respond to the status phase of the CONTROL transmission.
Do I need to set up USB data trigger?
No need. During USB transfer, the MAX3420E automatically handles these triggers. The only situation that requires firmware intervention is when the host sets a new configuration in a multi-configuration design, which is very rare. For this purpose, the MAX3420E provides register bits to clear the endpoint trigger.
Clear the MAX3420E interrupt request bit by writing "1" to it. Is this the reverse operation?
It looks like reverse operation, but it is the most effective way to clear the register bit. In response to a typical interrupt request, the SPI host controller reads an interrupt request register (USBIRQ or EPIRQ) and checks with different mask bits to determine the source of the interrupt. For example, when testing the SUDAVIRQ interrupt request, the firmware reads R11 (EPIRQ), and reads the result with 00100000 (the SUDAVIRQ bit is the 5th bit) and operates. Programs generally use identifiers to represent 00100000, such as bmSUDAV. Once it is detected that the IRQ bit is equal to 1, the firmware can write the mask value back to the register (SUDAVIRQ = bmSUDAV) and only clear the bits that need to be cleared. The IRQ bit that writes zero is not changed.
Are there any programming tips?
When using SPI full-duplex mode, the first register access operation should set the FDUPSPI bit to 1, in order to correctly set the interface for subsequent access. Host software problem How can my Windows® application software communicate with the MAX3420E?
The Windows application software communicates with the USB host controller of the PC through the driver. The driver can be built in Windows or customized. Windows contains standard device class drivers, such as human-machine interface devices (HID) and mass storage devices. If your firmware supports one of these standard devices, your users do not need to install custom drivers.
If the device you design does not comply with the Windows standard device class, the end user must install a custom driver when the USB device is first inserted.
Does Maxim provide customized Windows drivers?Not available.
What example code does Maxim provide?
The USB EnumeraTIon Code (and More) for MAX3420E on the Maxim website provides example C code for implementing HID applications. The example code simulates a PC keyboard, and when the key is pressed, the text is entered into any Windows application (for example, Notepad) that can receive text. The application program complies with the standard HID category and does not require custom Windows drivers to run normally. Regardless of your target application, most of the example code is a USB "boilerplate" that can be used as the starting code for your application.
I want to design a device based on the MAX3420E, but there are no two options: Write your own Windows driver. This is more complicated and difficult, and is only recommended for experts. Purchase universal drivers. It is generally composed of a USB driver and a C function library that accesses the driver. The driver should match the VID (Vendor ID) and PID (Product ID) in your device descriptor. Microsoft will provide a universal BULK driver for USB in the upcoming "Vista" version of Windows. How does the MAX3420E compare to the USB "serial bridge" chip?
The USB serial bridge chip uses its USB port to connect to the PC, but for applications running on the PC, it is a virtual COM port. A custom driver provided by the chip supplier is required to achieve this COM to USB conversion. In this way, Windows applications that communicate with serial (COM) ports (such as HyperTerminal) can communicate with devices connected via USB.
The advantage of this method is that there is no need to enumerate firmware or host drivers. The disadvantages are reflected in performance, flexibility and support:
Performance: Because the bridging method is to emulate a serial port, the maximum available bandwidth is about 1Mbps, which is much lower than the 12Mbps rate of USB. Flexibility: The serial USB bridge chip emulates a serial device through a hardware connection. Unable to implement standard Windows-type devices (such as HID) or custom device types. Support: When using this chip to design products, your users need to install the matching driver. Since it is a custom driver, it is not guaranteed to be compatible with future operating system versions. If you choose this method, you should make sure that the supplier promises to provide driver support during the life of your product. What are the advantages and disadvantages of using MAX3420E?The disadvantage is that the MAX3420E controller requires firmware, and Maxim does not provide custom Windows drivers. But Maxim provides example firmware to show how to comply with the standard Windows device class (HID) to use the drivers that come with Windows.
The advantages of using the MAX3420E are reflected in performance, flexibility, and support.
Performance: The MAX3420E SPI port (interface with the controller) can run up to 26MHz. If the controller supports a higher SPI clock rate, the MAX3420E can provide a full-speed bandwidth USB transmission of up to 12Mbps. Flexibility: When using the MAX3420E, the device characteristics are completely determined by its own firmware. Therefore, any type of USB device can be constructed. Support: Once the operating system itself supports Universal USB (BULK) transmission, there will be less and less demand for serial USB bridge chips. Other questions Can my firmware determine the version of the chip I am using?Yes. The read-only register R18 contains the version number.
What is the latest version number of MAX3420E?
For the latest version of data and errata, please refer to the MAX3420E QV.
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